2009年10月1日 星期四

Analog Simulation Flow

PRESIM

schematic: composer

netlister: composer - cdl (si) : netlist

testbench: tb_dut (PVT)

simulator: hspice

processs model: t350nm, u180nm, u130nm, u110nm, u110nmAL  --> put in /home/atd/tech/...

 

tb_dut.lis  = tb_dut.sp  + netlist.spi

tb_dut.sp does not include process component (nmos, pmos), but need to include PVT, need to include process ==> change tb all the time

> make tb_dut.lis ==> update tb_dut.lis

 

netlist.spi = netlist + convt_model_process ==>  netlist only change in design phase; model_process only change occasionally

 

netlist: hard to make dependency because it's from composer.  ==> make netlist directly

> make netlist    ==> update netlist

> make tb_dut.lis  ==> update netlist.spi ==> update tb_dut.lis

 

POSTSIM

netlister: calibre

testbench: tb_dut (PVT), same as presim

simulator: hspice or Adit

processs model: t350nm, u180nm, u130nm, u110nm, u110nmAL  --> same as presim

 

tb_dut.post.lis = tb_dut.sp + netlist.post.spi

> make tb_dut.post.lis ==> update tb_dut.post.lis

 

netlist.post.spi = netlist.cal + convt_model_process

> make netlist.cal  ==> update netlist.cal

> make tb_dut.post.lis ==> update tb_dut.post.lis

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