Analog circuit desing is not an art (or only partly is an art).
Majority day-to-day life is normal. How come it is so difficult????
Because there is a big gap between device level and final result!!!
這是一個認知的間題
3 layers of knowledge in analog circuit
1. Device level
gm, rout, Cc
ft = gm/Cc; gain = gm * rout
3. Result and 現象
Oscillator: oscillate or not and lock time, frequency detune
PLL: lock or not and lock time, spur, phase noise
ADC: ENOB, SNDR
Problem ==>
1. Need lot of simulation time: garbage in; garbage out!!
2. No physical insight!!!!
Because a big gap between device parameter and result/現象
Solution ==> Bridge the gap using KPI
What is KPI?
between device parameters and final results
only a few (2-4 parameters)
A clear coorelation between KPI and final results (best if there is a math formula)
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